PCI Express (“PCIe”) was developed to overcome the traditional limitations with the older Peripheral Component Interface (“PCI”) model. In contrast to the parallel method of data transfer used in PCI, the PCIe bus transfers data serially. The PCIe model also has a point-to-point bus topology, pursuant to which a shared switch replaces the shared bus of the PCI model, and each PCIe device is provided with its own individual bus through which to communicate with the shared switch.
When two devices are communicating, the communicated data is broken up into discrete data packets, also known as transmission layer packets (“TLPs”). TLPs in a PCIe model are comprised of multiple bytes of information. The shared switch in the PCIe system routes bus traffic and also establishes point-to-point connections between any two communicating devices within a PCIe network. The TLPs are routed back and forth between the communicating devices by the shared switch along the respective links.
TLPs need to be properly tracked in the system. PCI Express therefore uses a global transaction ID concept to track transactions. The transaction ID must be unique for all request transactions that require completion. Each transaction ID consists of a bus number, device number, function number, and TAG ID. When a TLP for a request is returned by the “completer” (the portion of the system that completes transaction requests), the completer sends along the transaction ID within the completed TLP. The requester then looks at the transaction ID to see whether the completed TLP is meant for it.
While the combination of the bus number, device number and function number are enough to make any function of a bus or device unique, a single function can send multiple requests out that are still waiting for completion. The TAG ID is therefore used to distinguish these transactions further, so that even pending multiple requests from a single function can be uniquely identified. The PCI Express architecture requires a unique TAG ID for every completed TLP, but it does not specify how to generate them.
Several problems can occur as a result of improper generation of TAG ID values. In one scenario, the system could assign the same TAG ID to multiple requests. This would lead to improper tracking of transactions, which in turn could lead to loss or a mix-up of crucial data. In another scenario, many cycles could be unnecessarily spent on generating TAG IDs; this degrades transmission performance for processor-intensive transactions, particularly for “back-to-back” TLPs (i.e., when an incoming TLP begins being processed at the exact same cycle as the current TLP is finished being processed). Back-to-back TLPs, a relatively new capability of PCI Express systems thanks to recent technological improvements, are processed one after the other, with no dead cycles in between the processing. This creates a problem for many systems that generate TAG IDs on the fly, because they cannot generate TAG IDs quickly enough. The result is dead cycles as the system slows down to generate TAG IDs.
Therefore, a solution is needed that can guarantee unique TAG ID generation in a PCIe environment, and improve transaction performance so that TAG IDs can be generated in real time for back-to-back TLPs.